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DELTA
2008
4th
IEEE International
Symposium
on
Electronic
Design,
Test &
Applications
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Submissions (Deadline Extension) Accommodation (New cutoff dates) Venue (Delta 2008 - Transportation) Past Conferences
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Technical Program:
PDF Version Tuesday 22nd Jan 2008 16:00 REGISTRATION:
UC Bistro, Tower C, G/F, HKUST 17:00 Welcome
Reception: UC Bistro, Tower C, G/F, HKUST Wednesday 23rd Jan 2008 08:00 REGISTRATION:
Lecture Theatre J, LTJ, HKUST 09:00-09:10 Opening
Ceremony 09:10-09:20 Welcome
Address: Professor Roland
Chin, Vice President for Academic Affairs, HKUST 09:20-09:40 Committees
Address: General and Program Chairs 09:40-10:20
Keynote by Professor Niraj K. Jha, EEE Department, Princeton
University, USA, ¡°Digital System Testing: Emerging Issues,
Trends and Solution Approaches¡±, venue: Lecture Theatre J,
LTJ. 10:20-10:50
BREAK 10:50-12:10
SESSION 1, (Lecture Theatres J and K, HKUST) 10:50-12:10
Session 1A: Analogue Design 1, venue: Lecture Theatre J, LTJ. Chairs: Chung-Yu Wu (NCTU, Taiwan), Leung Lai Kan Lincoln
(CUHK, Hong Kong) ¡¤
A Design of 14-bits ADC and DAC
for CODEC Applications in 0.18¨¬m CMOS process Donghyun KO, Jihoon JUNG, younggun PU, SangKyung SUNG,
KangYoon LEE, ( Chul ¡¤
Compensation-Capacitor Free Pseudo
Three-Stage Amplifier with Large Capacitive Loads Ka NANG LEUNG, Yanqi ZHENG (The ¡¤
The design and optimization of a
25kS/s 10bit Micropower Current S/H Cell for Weak Current Bio-medical
Applications Ka Leong TSANG, Jie YUAN (HKUST, ¡¤
A Single-Stage SEPIC PFC Converter
for Multiple Lighting LED Lamps Hsiu-Ming HUANG, Shih-Hsiung TWU, Shih-Jen CHENG,
Huang-Jen CHIU ( 10:50-12:10
Session 1B: SoC and NoC Testing, venue: Lecture Theatre K, LTK. Chairs: Michel Renovell (LIRMM,
France), Cheng-Wen Wu (NTHU, Taiwan) ¡¤
Using Genetic Evolutionary
Software Application Testing to Verify a DSP SoC Adriel CHENG, Cheng-Chew LIM ( Yihe SUN, Hu HE, Zhixiong ZHOU, Ting LEI ( ¡¤
Channel Width Utilization
Improvement in Testing NoC-Based Systems for Test Time Reduction Jia LI, Qiang XU, Yu HU, Xiaowei LI (ICT, Chinese ¡¤
Coordinated versus Uncoordinated
Checkpoint Recovery for Network-on-Chip based Systems Claudia RUSU, Lorena ANGHEL (TIMA Cristian GRECU ( ¡¤
Testing of a Highly Reconfigurable
Processor Core for Dependable Data Streaming Applications Hans G. KERKHOFF ( Jarkko J. M. HUIJTS (TDT, The 12:10-13:20
LUNCH at UC Bistro, Tower C, G/F, HKUST 13:20-15:00
SESSION 2 (Lecture Theatres J and K, HKUST) 13:20-15:00
Session 2A: Signal and Image Processing, venue: Lecture Theatre
J, LTJ. Chairs: Yuminosuke Yano ( ¡¤
A Fast Algorithm for the Chirp
Rate Estimation Jihai CAO, Ning ZHANG, Lin SONG (Harbin Institute of ¡¤
Crack Detection on Asphalt Surface
Image Using Enhanced Grid Cell Analysis Siwaporn SORNCHAREAN, Suebskul PHIPHOBMONGKOL ( ¡¤
Image Model Use for 1D Near
Optimal Interpolation for Image Super-resolution Andrew GILMAN, Donald G. BAILEY, Stephen R. MARSLAND ( ¡¤
Performance Estimation of Crash
Control System using Image Processing Sriram MURALI, Ramachandran SHANKAR ( 13:20-15:00
Session 2B: Advanced Communication Systems, venue: Lecture
Theatre K, LTK. Chairs: Zhihua Wang ( ¡¤
A High Speed CMOS Transmitter and
Rail-to-Rail Receiver Feng ZHANG, Lingyi HUANG, Weinwu HU (Institute of
Computing ¡¤
Design of a 12-Channel 120-Gb/s
Optical Receiver Array in 0.18-¦Ìm CMOS Technology W. S. OH, K. PARK, J. C. CHOI, C. J. KIM, S. I. LEE, J.
K. MOON (Korea Electronics Technology Institute, ¡¤
99-dB High-Performance Delta-Sigma
Modulator for 20-kHz Bandwidth Youngkil CHOI, Hyungdong ROH, Hyunseok ¡¤
Analysis and Design of a
Continuous-Time Sigma-Delta Modulator with 20MHz Signal Bandwidth, 53.6dB Tao WANG, Liping LIANG ( 15:00-15:30
BREAK & POSTERS 15:00-15:30
Poster Session 1, venue: Area outside Lecture Theatre K & J. Chair: Abbes Amira (Brunel University, UK) ¡¤
An FPGA Implementation of the
Searcher Algorithm A. SAGAHYROON, M. El TARHUNI, S. IBRAHIM (American ¡¤
Analysis of CPU Utilisation and
Stack Consumption of a Multimedia Embedded System Amith KUMAR, Nuggehalli RAMACHANDRA, (Delphi Corporation,
Avin Kumar KANNUR ( ¡¤
Research on System Usability of
Digital Libraries in Yaohua YU, Zhengjie LIU ( ¡¤
A Fast Two-Stage Sample-and-Hold
Amplifier for Pipelined ADC Application Jian RUAN, ( Chung Len LEE ( ¡¤
Low Phase Noise Bond Wire VCO for
DVB-H Ki-Jin KIM, K. H. AHN, T. H. LIM (Korea Electronics
Technology Institute, ¡¤
A Novel Dummy bitline Driver for
Read Margin Improvement in an eSRAM M. Yap San MIN, P. MAURINE, M. BASTIAN, M. ROBERT
(LIRMM, France) ¡¤
A 14-bit 320MSPS Segmented
Current-steering D/A Converter for High-speed Application Shangquan LIANG, Minglun GAO, Yongsheng YIN, Honghui
DENG ( ¡¤
A Multiprocessor System for a
Small Size Soccer Robot Control System Ce LI, Yang JIANG, Zhenyu WU, Takahiro WATANABE ( ¡¤
Low Cost Arbitration Method for
Arbitrarily Scalable Multiprocessor Systems Tero VALLIUS, Juha RÖNING ( ¡¤
An Efficient Design of Single
Event Transients Tolerance for Logic Circuits Yantu MO, Suge YUE ( ¡¤
Adaptive Diagnostic Pattern
Generation for Scan Chain Fei WANG, Yu HU, Xiaowei LI (ICT, Chinese ¡¤
Built-In Self-Test for Embedded
Voltage Regulator Jiang SHI, Ricky SMITH ( 15:30-17:10
SESSION 3 (Lecture Theatres J and K, HKUST) 15:30-17:10
Session 3A: Special Session on High Performance Reconfigurable
Computing, venue: Lecture Theatre J, LTJ. Chairs: Abbes Amira ( ¡¤
Recent Trends in FPGA
Architectures and Applications (invited talk) Philip H. W. LEONG ( ¡¤
Embedding Smart Buffers for Window
Operations in a Stream-Oriented
C-to-VHDL Compiler Fabian DIET, Erik H. D¡¯HOLLANDER, Kristof BEYLS, Harald
DEVOS ( ¡¤
Implementation of Hardware
Encryption Engine for Wireless Communication on a Reconfigurable Instruction
Cell Architecture Zong WANG, Tughrul ARSLAN, Ahmet ERDOGAN ( ¡¤
Dynamic slowdown and partial
reconfiguration to enhance power and scalability in FPGA based auto-adaptive
SoPC Xun ZHANG, Hassan RABAH, Serge WEBER (Nancy Universit¨¦,
France) ¡¤
xDSL Network Upgrade Employing
FPGAs Milos MILOSAVLJEVIC, Faycal BENSAALI, Pandelis
KOURTESSIS ( 15:30-17:10
Session 3B: Sensor, Implants and Display, venue: Lecture Theatre
K, LTK. Chairs: Hong Chen ( ¡¤
Architecture of a Low Storage
Digital Pixel Sensor Array with an On-line Block-Based Compression Milin ZHANG, Amine BERMAK (HKUST, ¡¤
Effects of insulator thickness on
the sensing properties of MISiC Schottky-diode hydrogen sensor W. M. TANG, C. H. LEUNG, P. T. LAI (HKU, Hong Kong) ¡¤
High Speed Depth Estimation using
Tilted Focal Planes Hiroshi IKEOKA, Takayuki HAMAMOTO ( ¡¤
Multi-Phase Charge Pump Generating
Positive and Negative High Voltages for TFT-LCD Gate Driving Chi-Hao WU, Chern-Lin CHEN ( ¡¤
Power Issues on Circuit Design for
Cochlear Implants (invited talk) Zhihua WANG, Songping MAI, Chun ZHANG ( Thursday 24th
Jan 2008 08:40-10:00
SESSION 4 (Lecture Theatres J and K, HKUST) 08:40-10:00
Session 4A: Advanced Memory Design, venue: Lecture Theatre J,
LTJ. Chairs: Zhang Feng (ICT, ¡¤
Dynamic Co-operative Intelligent
Memory Xiaoyong WEN, Faycal BENSAALI, Reza SOTUDEH ( ¡¤
An Accurate and Eui-Young CHUNG, ( Cheol Hong KIM, ( Sung Woo CHUNG ( ¡¤
Proposal for a Bidirectional Gate
using Pseudo Floating-Gate O. MIRMOTAHARI, Y. BERG ( ¡¤
Read Stability and Write Ability
Trade-off for 6T SRAM Cells in Double-Gate CMOS Bastien GIRAUD, Amara AMARA (ISEP, France) 08:40-10:00
Session 4B: Signal, Faults and Yield modelling, venue: Lecture
Theatre K, LTK. Chairs: Marcel Jacomet ( ¡¤
Compact Models for Signal
Transient and Crosstalk Noise of Coupled RLC Interconnect Lines with Ramp
Inputs Taehoon KIM, Dongchul KIM, Jung-A LEE, Yungseon EO ( ¡¤
Improving Diagnosis Resolution
without Physical Information A. ROUSSET, A. BOSIO, P. GIRARD, C. LANDRAULT, ¡¤
Predictive Die-Level
Reliability-Yield Modelling Melanie Po-Leen OOI, Ye Chow KUANG, ( Chris CHAN, (Freescale Semiconductor, Serge DEMIDENKO ( ¡¤
Hierarchical Calculation of
Malicious Faults for Evaluating the Fault-Tolerance Raimund UBAR, Sergei DEVADZE, Maksim JENIHHIN, Jaan
RAIK, Gert JERVAN, Peeter ELLERVEE (Tallinn Technical University, Estonia) 10:00-10:30
BREAK & POSTERS 10:00-10:30
Poster Session 2, venue: Area outside Lecture Theatre K & J. Chair: Abbes Amira (Brunel University, UK) ¡¤
FPGA implementation of a Single
Pass Connected Components Algorithm Christopher T. JOHNSTON, Donald G. BAILEY ( ¡¤
A low voltage rail-to-rail OPAMP
design for biomedical signal filtering applications Hwang-Cherng CHOW, Pu-Nan WENG ¡¤
Workload-Based Dynamic Voltage
Scaling with the QoS for Streaming Video Hong Moon WANG, Hyun Suk CHOI, Jong Tae KIM ( ¡¤
Speech Recognition of Isolated
Malayalam Words Using Wavelet Features and Artificial Neural Network Vimal V. R. KRISHNAN, Athulya JAYAKUMAR, P. Babu ANTO ( ¡¤
FPGA based Real Time Solution for
Sensitivity Time Control D. MEENA, L. G. M. PRAKASAM (Electronics and Radar
Development Establishment, ¡¤
A Jittered-Sampling Correction
Technique for ADCs Jamiil TOURABALY, Adam OSSEIRAN (ECU, ¡¤
Robust JPEG2000 Image Transmission
over IEEE 802.15.4 Kyu-Yeul WANG, Seung-Yerl LEE, Byung-Soo KIM, Sang-Seol
LEE, Jae-Yeon SONG, Duck-Jin CHUNG (Inha University, South Korea), Dong-Sun KIM (Korea Electronics Technology Institute, ¡¤
New D-Type Flip-Flop Design Using
Negative Differential Dong-Shong LIANG, Kwang-Jow GAN ( ¡¤
Experimental Characterisations of
Coupled Transmission Lines Dongchul KIM, Taehoon KIM, Jung-A LEE, Yungseon EO ( ¡¤
A Low Power Deterministic Test
Pattern Generator for BIST Based on Cellular Automata Bei CAO, Liyi XIAO, Yongsheng WANG (Harbin Institute of
¡¤
A Test Data Compression Method for
System-on-a-Chip Jianhua FENG, Guoliang LI ( 10:30-12:10
SESSION 5 (Lecture Theatres J and K, HKUST) 10:30-12:10
Session 5A: DSP and Processor Design, venue: Lecture Theatre J,
LTJ. Chairs: Donald Bailey ( ¡¤
A hybrid of clonal selection
algorithm and frequency sampling method for designing a 2-D FIR filter Te-Jen SU, Chun-Hsiang KUO, Wen-Pin TSAI, Cheng-Chih
HOU ( ¡¤
A Generation Flow for
Self-Reconfiguration Controllers Customization Andrea CUOCCIO, Paolo R. GRASSI, Vincenzo RANA, Marco
D. SANTAMBROGIO, Donatella SCIUTO (Politecnico di Milano, Italy) ¡¤
Design of High-Speed Floating
Point Multiplier Saroja V. SIDDAMAL, R. M. BANAKAR (BVBCET, B. C. JINAGA (JNTU, ¡¤
High Performance Elliptic Curve
Cryptographic Processor Over GF(2^163) Hyun Min CHOI, Chun Pyo HONG, Chang Hoon KIM ( ¡¤
A Visual Notation for Processor
and Resource Scheduling Christopher T. JOHNSTON, Paul 10:30-12:10
Session 5B: DfT and BIST, venue: Lecture Theatre K, LTK. Chairs: Hans Kerkhoff ( ¡¤
Design For Testability of
Functional Cores for High Performance Node Architectures Venkateswaran NAGARAJAN, Karthik CHANDRASEKAR,
Shrikanth GANAPATHY (Waran Research ¡¤
Test Response Data Volume and Wire
Length Reductions for Extended Compatibilities Scan Tree Construction Yong-sheng CHENG, Zhi-qiang YOU, Ji-shun KUANG ( ¡¤
AES-based BIST: self-test, test
pattern generation and signature analysis M. DOULCIER, M.-L. FLOTTES, B. ROUZEYRE (LIRMM, France) ¡¤
Oscillation-Based Test in Data
Converters: On-line Monitoring Gloria HUERTAS ( Jose L. HUERTAS (Universidad De Sevilla, spain) ¡¤
A case study on At-Speed Testing
of a Gigahertz Microprocessor Da WANG, Rui LI, Yu HU, Huawei LI, Xiaowei LI (ICT,
Chinese 12:10-13:20
LUNCH; Chinese Restaurant, G/F, HKUST 13:20-14:40
SESSION 6 (Lecture Theatres J and K, HKUST) 13:20-14:40
Session 6A: Analogue Design 2, venue: Lecture Theatre J, LTJ. Chairs: Alex Ka Nang Leung (CUHK,
Hong Kong), Adam Osseiran (ECU, ¡¤
A charge pump circuit -- cascading
high-voltage clock generator Wen Chang HUANG, Po Chih LIOU ( Jin Chang CHENG ( ¡¤
Threshold Voltage Start-up Boost
Converter for Sub-mA Applications Ngok-Man SZE, Wing-Hung KI, Chi-Ying TSUI (HKUST, ¡¤
Design of a Low-Voltage CMOS
Charge Pump Chun Yu CHENG, Ka Nang LEUNG, Yi Ki SUN, Pui Ying OR
(The Chinese University of Hong Kong) ¡¤
High-Input Impedance Voltage-Mode
Universal Biquadratic Filter with One input and Five Outputs using DDCCs Wei-Yuan CHIU, Jiun-Wei HORNG, Shyuan-Shenq YANG ( 13:20-14:40
Session 6B: Energy and Cost Efficient Reconfigurable Systems,
venue: Lecture Theatre K, LTK. Chairs: Hans-Joerg Pfleiderer ( ¡¤
Temporal-Spatial Correlation Based
Mode Decision Algorithm for H.264/AVC Encoder Bin ZHAN, Baochun HOU, Reza SOTUDEH ( ¡¤
A Software-to-Hardware
Self-Mapping Technique to Enhance Program Throughput for Portable Multimedia
Workloads Allen C. CHENG ( ¡¤
Improved Policies for Drowsy
Caches in Embedded Processors Junpei ZUSHI, Gang ZENG, Hiroyuki TOMIYAMA, Hiroaki
TAKADA ( Koji INOUE (Kyushu University, Japan) ¡¤
Improving cost-effectiveness using
a micro-level static architecture for stream applications Pil Woo CHUN, Jamin ISLAM, Valeri KIRISCHIAN, Lev
KIRISCHIAN ( 14:40-15:20
BREAK & POSTERS 14:40-15:20 Poster
Session 3: Special Session on Advanced Biometric and Security Systems, venue:
Area outside Lecture Theatre K & J. Chair: Abbes Amira (Brunel University, UK) ¡¤
A compact CMOS Face Detection
architecture based on Shunting Inhibitory Convolutional Neural Networks Xiaoxiao ZHANG, Amine BERMAK (HKUST, Farid BOUSSAID (UWA, Abdesselam BOUZERDOUM ( ¡¤
Temperature Modulation for
Tin-Oxide Gas Sensors Aicha FAR, Bin GUO, Farid FLITTI, Amine BERMAK (HKUST, ¡¤
Eigenspectra Palmprint Recognition Moussadek LAADJEL, Ahmed BOURIDANE, Fatih KURUGOLLU ( ¡¤
VLSI architecture and FPGA
implementation of a hybrid message embedded self-synchronizing stream cipher Camel Tanougast, S. WEBER, Gilles MILLERIOUX, J.
DAAFOUZ (University Henri Poincar¨¦, France) Ahmed BOURIDANE ( ¡¤
DWT/PCA Face Recognition using
Automatic Coefficient Selection Paul NICHOLL ( Abbes AMIRA (Brunel University, UK) ¡¤
A Spiking Neural Network for Gas
Discrimination using a Tin Oxide Sensor Array Maxime AMBARD, Dominique MARTINEZ (LORIA-INRIA, France) Bin GUO, Amine BERMAK (HKUST, 15:20-16:00
Keynote by Professor Charles Sodini, Massachusetts Institute of
Technology, USA, ¡°System Drivers for Mixed Signal Integrated
Circuit Design Research¡±, venue: Lecture Theatre J, LTJ. 17:30-22:00
SOCIAL EVENT & BANQUET: ¡°BOAT CRUISE¡± Friday 25th
Jan 2008 09:00-10:20
SESSION 7 (Lecture Theatres J and K, HKUST) 09:00-10:20 Session 7A: NoC
and SoC Design, venue: Lecture Theatre J, LTJ. Chairs: Stefan Lachowicz (ECU, ¡¤
A Hybrid Interconnect
Network-on-Chip and a Transaction Level Modeling approach for Reconfigurable
Computing Thomas LENART, Henrik SVENSSON, Viktor ÖWALL ( ¡¤
A Requirements-Driven
Reconfigurable SoC Communication Infrastructure Design Flow Alessandro MERONI, Vincenzo RANA, Marco SANTAMBROGIO,
Donatella SCIUTO ( ¡¤
High-Speed Priority Queue
Architecture for Multiple Out-Links Sang Gyun KIM, Woo Sik KIM, Seung Ho OK, Byung In MOON
( ¡¤
Integrated Mapping and Scheduling
for Circuit-Switched Network-on-Chip Architectures Hsin-Chou CHI, Chia-Ming WU, Jun-Hui LEE ( 09:00-10:20
Session 7B: Systems and Sensors, venue: Lecture Theatre K, LTK. Chairs: Jie George Yuan (HKUST, Hong
Kong), Achim Rettberg ( ¡¤
Drift invariant Gas Recognition
Technique For Tin Oxide Gas Sensor array Farid FLITTI, Aicha FAR, Bin GUO, Amine BERMAK (HKUST, ¡¤
On Using Fingerprint-Sensors for
PIN-Pad Entry Marcel JACOMET, Josef GOETTE ( Andreas EICHER (AXSionics Inc., ¡¤
FPGA Implementation of a
Predictive Vector Quantization image compression algorithm for image sensor
applications Yan WANG, Amine BERMAK (HKUST, Abdesselam BOUZERDOUM ( Brian NG ( ¡¤
Integrating Dynamic Load Balancing
Strategies into the Car-Network Isabell JAHNICH, Ina PODOLSKI, Achim RETTBERG ( 10:20-10:50
BREAK & POSTERS 10:20-10:50
Poster Session 4, venue: Area outside Lecture Theatre K & J. Chair: Abbes Amira (Brunel University, UK) ¡¤
A Design of the Frequency
Synthesizer for UWB Application in 0.13 µm RF CMOS process JinKyung KIM, Sung-Kyu JUNG, Ji-Hoon JUNG, Sang-Kyung
SUNG, Kang-Yoon LEE ( Chul ¡¤
Analog to Digital Converter
Specifications for UMTS/FDD Receiver Application Zulhakimi RAZAK, Tughrul ARSLAN ( ¡¤
A Design Workflow for the
Identification of Area Constraints in Dynamic Reconfigurable Systems Alessio MONTONE, Marco D. SANTAMBROGIO, Donatella
SCIUTO ( ¡¤
Bus Binding, Re-ordering, and
Encoding for Crosstalk-producing Switching Activity Minimization during High
Level Synthesis Hariharan SANKARAN, Srinivas KATKOORI ( ¡¤
Scalable Tae Ho KIM, Sang Chul KIM, Chang Hoon KIM, Chun Pyo
HONG ( ¡¤
Static Crosstalk Noise Analysis
with Transition Map Minjin ZHANG, Huawei LI, Xiaowei LI (ICT, Chinese ¡¤
Implementation of the Embedded
System for Visually-Impaired People Si-Woo KIM, Jae-Kyun LEE, Boo-Shik RYU, Chae-Wook LEE ( ¡¤
Model-based Gaze Direction
Estimation in Office Environment Do Joon JUNG, Kyung Su KWON, Se Hyun PARK, Jong Bae
KIM, Hang Joon KIM ( ¡¤
Fast Evaluation of the Square Root
and Other Nonlinear Functions in FPGA Hans-Jörg PFLEIDERER ( ¡¤
Configurable Blocks for
Multi-Precision Multiplication Oliver A. PFÄNDER, Reinhard NOPPER, Hans-Jörg
PFLEIDERER ( Shun ZHOU, Amine BERMAK (HKUST, ¡¤
High Performance FPGA
Implementation of the Mersenne Twister Shrutisagar CHANDRASEKARAN, Abbes AMIRA (Brunel
University, UK) ¡¤
Static Crosstalk Noise Analysis
with Transition Map A. BOUHRAOUA, M. E. ELRABAA (KFUPM, 10:50-12:10
SESSION 8 (Lecture Theatres J and K, HKUST) 10:50-12:10
Session 8A: Special Session on Smart Sensors, venue: Lecture
Theatre J, LTJ. Chairs: Amara Amara (ISEP,
France), Subhas Mukhopadhyay ( ¡¤
The Fourier Spectrum Analysis of
Optical Feedback Self-Mixing Signal under Weak and Moderate Feedback Xiaojun ZHANG, Jiangtao XI, Yanguang YU, Joe CHICHARO
(University ¡¤
Elimination of Non-linear
Luminance Effects for Digital Video Projection Phase Measuring Profilometers Matthew BAKER, Jiangtao XI, Joe CHICHARO (University ¡¤
Integrated CMOS analog neural
network ability to linearise the distorted characteristic of HPA embedded in
satellites Laurent GATET, Francis GIZARD (CNES, France) H¨¦l¨¨ne TAP-BETEILLE, Daniel ROVIRAS (ENSEEIHT, France) ¡¤
Compact Gray-Code Counter/Memory
Circuits for Spiking Pixels Kwan Ting NG, Farid BOUSSAID (UWA, Chen SHOUSHUN, Amine BERMAK (HKUST, 10:50-12:10
Session 8B: Advanced Testing Techniques, venue: Lecture Theatre
K, LTK. Chairs: JoseLuis Huertas ( ¡¤
Calibration and Debugging of
Multi-Step Analog to Digital Converters Amir ZJAJO, Jose PINEDA de GYVEZ (NXP Semiconductors
Research, The ¡¤
A Prevenient Voltage Stress Test
Method for High Density Memory Jongsoo YIM, Gunbae KIM, Sungho KANG ( Incheol NAM, Sangki SON, Jonghyoung LIM, Hwacheol LEE,
Sangseok KANG, Byungheon KWAK, Jinseok LEE (Samsung Electronics, South Korea) ¡¤
A Scan-based delay test method for
reduction of overtesting Hui LIU, Huawei LI, Yu HU, Xiaowei LI (ICT, Chinese ¡¤
An Integrated Validation
Environment for Differential Power Analysis Giorgio Di NATALE, Marie-Lise FLOTTES, Bruno ROUZEYRE
(LIRMM, France) ¡¤
Automated Testing of FlexRay
Clusters for System Inconsistencies in Automotive Networks Paul MILBREDT (AUDI AG, Andreas STEININGER (Technische Martin HORAUER (University of Applied Sciences 12:10-13:20
LUNCH, Chinese Restaurant, G/F, HKUST 13:20-14:00
Keynote by Dr Stephen Lai, Solomon Systech, Hong Kong, ¡°Technology
Trend of Flat Panel Display Driver Electronics¡±, venue: Lecture Theatre J,
LTJ. 14:00-15:20
SESSION 9 (Lecture Theatres J and K, HKUST) 14:00-15:20
Session 9A: Power Issues in Design, venue: Lecture Theatre J,
LTJ. Chairs: Zhihua Wang ( ¡¤
Early Design Phase Power Performance
Trade-offs Using In-situ Macro Models Charles THANGARAJ, Tom CHEN ( ¡¤
Low Voltage Design against Power
Analysis Attacks O. MIRMOTAHARI, Y. BERG ( ¡¤
Electrical Power Monitoring System
using Thermochron Sensor and 1-Wire Communication Protocol Moi-Tin CHEW ( Tatt-Huong THAM, Ye-Chow KUANG ( ¡¤
Infrastructure for
Microelectronics Education, Research and SMEs (Special Presentation) Bernard COURTOIS (CMP, France) 14:00-15:20
Session 9B: VLSI System Design, venue: Lecture Theatre K, LTK. Chairs: Ton Mouthaan ( ¡¤
Efficient VLSI layout of Edge
Product Networks Saeedeh BAKHSHI, Hamid SARBAZI-AZAD (Sharif ¡¤
Towards a Petri Net based Approach
to Model and Synthezise Dynamic Reconfiguration for FPGAs Helene SCHILKE, Achim RETTBERG, Florian DITTMANN ( ¡¤
Arbitrary Waveform Generator Based
on Direct Digital Frequency Synthesizer Weibo HU, Xin¡¯an WANG ( Chung Len LEE ( ¡¤
Design of a Data Concentrator Card
for the Readout of the Compact Muon Solenoid Electromagnetic Calorimeter Jose Carlos Da SILVA, Michal HUJESKO (LIP-Lisbon,
Portugal) Joao VARELA (CERN, 15:20-15:40
BREAK 15:40-16:40
SESSION 10 (Lecture Theatres J and K, HKUST) 15:40-16:40
Session 10A: Advanced and high-level test methods, venue: Lecture
Theatre J, LTJ. Chairs: ¡¤
A Novel Approach to High-level
Property Checking Using Wu¡¯s Method Zhi YANG, Guangsheng MA, Shu ZHANG ( ¡¤
Test Set Stripping Limiting the
Maximum Number of Specified Bits Michael A. KOCHTE, Christian G. ZOELLIN, Michael E.
IMHOF, Hans-Joachim WUNDERLICH (Universitaet Stuttgart, Germany) ¡¤
An Automated Fault Injection
Technique Based on VHDL Syntax Analysis and Stratified Sampling Weiguang SHENG, Liyi XIAO, Zhigang MAO (Harbin
Institute of 15:40-16:40
Session 10B: Advanced Applications, venue: Lecture Theatre K,
LTK. Chairs: Serge Demidenko ( ¡¤
CreaTe: A new programme to attract
engineers as design artists Zsofi RUTTKAY, Ton MOUTHAAN ( ¡¤
High-Performance Pseudorandom
Number Generator Using Two-Dimensional Cellular Automata ¡¤
Design Automation of UHF RFID Tag
Antenna Using a Genetic Algorithm Linked with MWS CST Kyounghwan LEE, Youngju KIM, Goojo KIM, You Chung CHUNG
( 16:40-17:00
CLOSING SESSION ¨CClosing remarks by the conference chairs, Best
paper awards |
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