08:30 PHOTONICS opening
Jiang Xu, Hong Kong University of Science and Technology
Zining Wu, InnoGrit
Session I: Silicon Photonic Systems
Chaired by Zining Wu, InnoGrit
08:40 Future HPC Systems Empowered by Silicon Photonics
Yuichi Nakamura, System Platform Research Labs, NEC
Yuichi Nakamura received his B.E. degree in information engineering and M.E. degree in electrical engineering from the Tokyo Institute of Technology in 1986 and 1988, respectively. He received his PhD. from the Graduate School of Information, Production and Systems, Waseda University, in 2007. He joined NEC Corp. in 1988 and he is currently the General Manager of System Platform Research Labs., NEC Corp. He is also a guest professor of National Institute of Informatics and a vice chair of IEEE CAS Japan Chapter. He has more than 25 years of professional experience in electronic design automation, signal processing, network on chip, signal processing, and embedded software development.
Abstract: Currently, big data analysis for social issues is a very important application for HPC systems. Although processing architecture is kept evolving, interface architecture among servers is required innovation to realize fast big data analysis without bottleneck of data communication. One solution is optical communication of the servers. In this talk, the trend of optical communication methods among the servers, technologies of silicon photonics and the advantage of optical connection in the near future are presented.
09:10 Toward Exa-scale Optical Circuit Switch Interconnect for Future Computing Systems
Kiyo Ishii, Takashi Inoue, and Shu Namiki
Japan National Institute of Advanced Industrial Science and Technology (AIST)
Kiyo Ishii is with Optical Network Technologies Group of AIST, Japan. She completed the doctor's program in 2011 at Nagoya University, Japan. Her current research interests include optical network systems, energy efficient networks, photonic interconnects, and network resource optimization.
Abstract: An Exa-scale optical interconnect network capable of more than 10 Tbps link bandwidth and more than 100,000 end points scalability is discussed. To support massive parallel processes in future computing systems, a high capacity and low latency interconnect network is essential. To handle such large bandwidth interconnect networks with low energy consumption, wavelength division multiplexing (WDM) transmission and optical switch technologies will become inevitable. A system concept of an Exa-scale interconnect network employing the WDM transmission and optical circuit switching technology is presented. The energy consumption of the optical circuit switching interconnect network is estimated. Then the WDM transmission and a shared WDM light source is introduced to achieve a Tbps-class link bandwidth with simple optical transceivers. A new optical switch control approach which can reduce the control overhead time is also proposed. Some of the challenges which should be resolved to practically realize the future large bandwidth optical interconnect networks are also discussed.
09:40 Datacenter Networking in the Era of Plentiful Bandwidth [PDF]
George Porter, University of California San Diego
George Porter is an Assistant Professor at UC San Diego and the Co-Director of UCSD's Center for Networked Systems, working on topics related to data-intensive computing and data center networking. He has received a Google Focused Research Award, a NetApp Faculty Fellowship, and the NSF CAREER award. He received his B.S. from the University of Texas at Austin and his Ph.D. from the University of California, Berkeley.
Abstract: Over the past 10 years, the rapid growth in compute and storage requirements of modern Internet-based sites has driven rapid development of the underlying network layer. Increasing bandwidth requirements have led to highly-scalable variants of multi-rooted Clos topologies, and most recently proposals for hybrid electrical-optical designs. Yet new advancements in silicon photonics promise to dramatically lower the cost per bit per second of optical links, effectively making bandwidth "free". In this talk, I outline a set of challenges that arise beyond simply increasing bandwidth, and discuss some options for supporting these requirements with commercial and near-commercial technologies.
10:10 Poster and Coffee Break
10:40 Router Architectural Complexities of Interacting with Silicon Photonics [PDF]
Nic McDonald, System Architecture Lab, HP Labs
Nic McDonald is a Research Scientist in the System Architecture Lab of Hewlett Packard Labs. He has developed a simulation infrastructure, called SuperSim, for fast cycle-accurate simulation of large scale interconnection networks. He has also developed tools for system level topology discovery and optimization. Nic is using these tools in multiple network architecture projects at HPE which focus on building large scale high performance networks enabled by next generation silicon photonics. Nic completed a B.S. in Computer Engineering in 2010 and a M.S. in Electrical and Computer Engineering in 2012 from the University of Utah working with Professor Al Davis. During his B.S. and M.S., Nic was employed at L-3 Communications as a Hardware Design Engineer developing wireless communication systems for unmanned aerial vehicles (UAVs) and military hand-held devices. He recently completed a Ph.D. in Electrical Engineering at Stanford University working with Professor Bill Dally. Nic's Ph.D. thesis is on High Performance Service Oriented Computing aimed to make supercomputing networks usable in data centers and cloud computing facilities.
Abstract: Silicon photonics bring many benefits to the world of high-performance interconnection networks including high bandwidths, nearly distance independent power consumption, and very low bit error rates. With the breakdown of Dennard scaling and the ever increasing quantity of bandwidth the microarchitectural complexities of interacting with silicon photonics are rapidly increasing. This talk outlines several issues relating to these complexities and discusses some workarounds for them. This talk also discusses some technologies where silicon photonics have changed the assumptions about previously determined best practices.
11:10 On the Way to Photonic Interposers: Building Blocks for Short-Distance Optical Communication
Yvain Thonnart, CEA Leti
Yvain Thonnart graduated from the Ecole Polytechnique and Telecom ParisTech, France. He joined CEA-LETI in 2005 and is now an expert on communications and synchronization in Systems on Chip. His research interests include asynchronous logic, network-on-chip architectures, physical implementation of energy-efficient SoCs. He is currently leading a project on silicon photonics interposers for optical communications in massively parallel Systems on Chip.
Abstract: Efficient data transfer between IOs, memories and cores is a key element of high-performance computing. The trend for massively parallel architectures increases the communication needs, and it becomes ever harder to maintain low latencies for high-bandwidth communication between more and more cores and memory banks. To overcome this, we are investigating the potential of optical communication on large silicon interposers, that could serve to stack and connect computing and memory chiplets together. In this talk, we will present recent developments at CEA-Leti considering the architectural, design and fabrication aspects of these optical interposers, going from digital, high-speed analog, to the optical devices, in view of the power and thermal constraints, and give some insight on the integration of these building blocks on a complete electro-optical computing module.
11:40 Deeply Integrated Photonic I/O
Alex Wright, Ayar Labs
Alex Wright-Gladstein is the co-founder and CEO of Ayar Labs, the first company to make miniaturized optical transceivers in standard high-performance CMOS chips with no change to the electrical chip manufacturing process. Its mission is for all chips to communicate with light instead of electricity. She co-founded the company while getting her MBA at MIT, where she met the inventors of the technology breakthrough and convinced them to start a company to reduce the amount of energy used in computing, the fastest-growing user of energy worldwide. Prior to MIT, she worked in energy efficiency and smart grids at EnerNOC.
Abstract: Next-generation HPC systems will require higher bandwidth links and lower power consumption per bit transmitted. Ayar Labs is pursuing a microring-based architecture, which has the potential to reduce the consumption of optical links to ~1 pJ/b. With electrical chip I/O consuming ~10 pJ/b, optical link energy use will bypass electrical link efficiency even for on-board distances. Moving optical transceivers from on-board to in the chip package enables a reduction in electrical link energy consumption to ~1 pJ/b using extra short reach electrical links. This talk presents the benefits of using a microring-based photonic architecture on a CMOS chip for optical transceiver integration in a multi-chip module (MCM), and of separating the laser from the MCM to ensure product reliability and high energy efficiency.
12:10 Lunch Break
Session II: Silicon Photonic Design and Fabrication
Chaired by Yuichi Nakamura, NEC
14:00 Monolithic Silicon Photonics for Data Communications
Chi Xiong, Silicon Photonics Group, IBM Thomas J. Watson Research Center
Dr. Chi Xiong is currently a Research Staff Member in the Silicon Photonics group at IBM Thomas J. Watson Research Center. Dr. Xiong's research at IBM focuses on silicon photonics for data communication and on-chip trace gas spectroscopy. His research interests include silicon traveling-wave modulators, advanced modulation formats, quantum optics, and optomechanical resonators. Dr. Xiong received the B.S. degree in Microelectronics from Peking University in 2006, and the Ph.D. degree in Electrical Engineering from Yale University in 2012. Before joining IBM in 2013, Dr. Xiong's research at Yale focused on developing an active silicon photonics platform based on aluminum nitride. In 2016, Dr. Xiong received an Outstanding Technical Achievement Award from IBM for his contribution to develop silicon photonics toward commercialization.
Abstract: Silicon photonics promises to transform data communications through low cost manufacturing of photonics and electronics on a single platform. At IBM, we are developing a sub-100nm monolithic silicon photonics technology to enable cost-effective optical links that connect racks, modules, and chips together with ultra-low power single-die optical transceivers. In this talk, I will give an overview of our manufacturable platform of CMOS, RF and optoelectronic devices. I will demonstrate a 56 Gb/s pulse-amplitude modulation transmitter and a reference 4x25 Gb/s transceiver design realized in our monolithic technology.
14:30 Integrated Silicon Photonics Technologies for High-Density Optical Interconnection
Yu Tanaka, Photonics Electronics Technology Research Association (PETRA)/Fujitsu Labs
Yu Tanaka is a Senior Researcher at PETRA, and joined Fujitsu Laboratories LTD. in 2002. He has been engaged in development of optical devices since then. He was involved in development and industrialization of quantum dot leases in 2010. He joined the photonics electronics technology research association (PETRA) in 2012 Currently, his main focus is the development and industrialization of integrated silicon-photonics-based optical transceivers.
Abstract: Recent progress in future high-density optical interconnection based on integrated silicon photonics technology is presented for future high performance computing and/or super computers. High-speed (25Gbps) optical interconnection composed of multi-chip module configuration between CPUs and the potential use of wavelength-division-multiplex (WDM) toward a higher-amount of data transmission are discussed.
15:00 III-V Membrane Lasers on Silicon for Datacom and Computercom Applications
Takaaki Kakitsuka, Takuro Fujii, Koji Takeda, Hidetaka Nishi, and Shinji Matsuo
Device Technology Labs. and Nanophotonics Center, NTT
Takaaki Kakitsuka received the B.S. and M.S. degrees in physics and the Dr. Eng. degree from Kyushu University, Fukuoka, Japan, in 1994, 1996, and 2012, respectively. In 1996, he joined NTT Opto-electronics Laboratories, Nippon Telegraph and Telephone Corporation (NTT), Kanagawa, Japan. From 2009 to 2011, he was a member of the research and development planning department. He has been engaged in research on semiconductor lasers and optical functional devices. He is now with NTT Device Technology Laboratories. His current interest is photonic integration on silicon substrate. Dr. Kakitsuka is a member of the IEEE, the Institute of Electronics, Information and Communication Engineers, the Japan Society of Applied Physics, and the Physical Society of Japan
Abstract: We present short-cavity membrane lasers and photonic crystal lasers for optical interconnections in datacom and computercom applications. The membrane structure is promising for short-reach transmitters because of the strong optical confinement in the active layer, which is advantageous for low-power-consumption directly modulated lasers. Towards photonic integration on large-scale wafers, we have developed fabrication techniques based on InP-based III-V membrane templates bonded to SiO2/Si substrate. The single-mode membrane lasers have progressed along with the development of crystal growth on the template. We have also integrated lasers with a silicon-based waveguide via spot-size converters (SSCs) to improve the optical fiber coupling. An eight-channel membrane distributed reflector laser array provides 25.8-Gbit/s direct modulation at the energy cost of around 200 fJ/bit, which is comparable to that of the VCSELs widely used for datacenter networks. We have also developed photonic crystal nano-cavity lasers for further reduction of energy cost to realize on-chip interconnections. The lowest energy cost of 5.5 fJ/bit has been achieved by wavelength (lambda)-scale embedded active region photonic crystal (LEAP) lasers on InP substrate; they are attractive for on-chip transmitters. LEAP lasers on SiO2/Si substrate have threshold current of 31 µA, the smallest among all lasers integrated on silicon.
15:30 Poster and Coffee Break
16:00 Enabling PDK Driven Design Automation for Photonic Integrated Circuits
Raha Vafaei, Lumerical Solutions
Raha is a technical manager at Lumerical Solutions. She has a PhD in electrical engineering from University of Grenoble in France and a Master degree in electrical engineering from University of British Columbia in Canada. Her research background included combinations of electrical and optical engineering, experimental setup design and assembly, microfabrication, characterization design of high quality factor optical sensors in SOI technology, InP edge emitting ring lasers for optical communications and integrated Silicon photodetectors.
Abstract: Continual investments from a wide range of markets, with significant contributions from telecommunications and data communication technology giants has emerged photonics as an attractive technology interruptive candidate to meet the ever-increasing demand for faster, more cost and energy efficient computing and communication systems. Today's photonic integrated manufacturers and designers are faced with challenges from having to work with a wide range of material systems and process technologies, as well as having to move between multiple simulation software and layout tools. Thus, there is a great need for complete end to end solutions that enable reliable design of larger and more complex integrated photonic systems; such a solution would require standardized design flows, unified design environments and mature photonic Process Design Kits (PDKs). To address these challenges Lumerical has teamed with leading EDA software providers and foundries to develop design workflows, compact model libraries and bring PDK driven design automation to photonic integrated circuit design.
16:30 Thermal Modeling and Analysis for Silicon Photonic Interconnect Networks [PDF]
Jiang Xu, Hong Kong University of Science and Technology
Jiang Xu received his PhD from Princeton University. He worked at Bell Labs, NEC Labs, and a startup company before joining the Hong Kong University of Science and Technology. Jiang established Big Data System Lab, Xilinx-HKUST Joint Lab, and OPTICS Lab at HKUST. He currently serves as the Associate Editor for IEEE TCAD, TVLSI, and ACM TECS. He served on the steering committees, organizing committees, and technical program committees of many international conferences, including DAC, DATE, ICCAD, CASES, ICCD, CODES+ISSS, NOCS, HiPEAC, ASP-DAC, etc. Jiang is an IEEE Distinguished Lecturer and was an ACM Distinguished Speaker. He authored and coauthored more than 100 book chapters and papers in peer-reviewed journals and international conferences. His research areas include big data system, heterogeneous computing, optical interconnection network, power delivery and management, MPSoC, low-power embedded system, hardware/software codesign.
Abstract: Optical interconnect networks based on silicon photonic devices can potentially offer ultra-high bandwidth, low power, and low latency to address inter/intra-rack, inter/intra-board, and inter/intra-chip communication challenges. However, thermal sensitivity is an intrinsic characteristic of silicon photonic devices and a potential issue. This project systematically modeled and analyzed the thermal effects in optical interconnect networks based on silicon-photonic devices, and proposed several effective techniques to alleviate their impacts. Based on this project, we developed and released an open-source tool, OTemp, to model and analyze the performance of optical interconnect networks under temperature variations.
17:00 Panel: Opportunities and Challenges of Silicon Photonics in Computing Systems
Moderated by Nic McDonald, HP Labs
Chi Xiong, IBM
Yuichi Nakamura, NEC
Alex Wright, Ayar Labs
Takaaki Kakitsuka, NTT
Raha Vafaei, Lumerical
Yu Tanaka, Fujitsu Labs
17:40 Closing Remarks
Yuichi Nakamura, NEC
Yuan Xie, University of California Santa Barbara